This invention relates in general to sense amplifiers and in particular, to a latch-type current sense amplifier circuit which generates latched complementary logic level data outputs indicative of a difference between two input currents.
In applications where the data lines providing the input currents to a latch-type sense amplifier are heavily loaded, such as reading the stored states of individual memory cells in a high density memory array, very little of the current flowing through the data lines may flow into the sense amplifier. As a result, the sense amplifier may have a slow response and further, may generate false sensings due to noise in the system.
FIG. 1 illustrates, as an example, a simplified circuit model of one input side of a prior art latch-type sense amplifier circuit 10. The sense amplifier circuit 10 is connected at a node 12 to a heavily loaded data line 14, which is characterized at node 12 by an impedance Z.sub.DL including an accumulated capacitance C.sub.DL of the heavily loaded data line 14. The sense amplifier circuit 10 includes a latch circuit 16 having a latch input 18 connected to the data line 14 at node 12. The latch input 18 is characterized at node 12 by an input impedance Z.sub.LATCH including an input capacitance C.sub.IN of the latch circuit 16. Typically, the input capacitance C.sub.IN of the latch circuit 16 is much smaller than the accumulated capacitance C.sub.DL of the heavily loaded data line 14. Consequently, the impedance Z.sub.DL of the data line 14 at node 12 is generally much smaller than the input impedance Z.sub.LATCH of the latch circuit 16 at node 12. When a current I.sub.DL flows through the data line 14, it splits at node 12 into two currents. One current I.sub.IN flows into the sense amplifier circuit 10, and the other current I.sub.1 continues to flow through the heavily loaded data line 14. Since the impedance Z.sub.DL of the data line 14 at node 12 is generally much smaller than the input impedance Z.sub.LATCH of the latch circuit 16 at node 12, the current I.sub.IN flowing into the sense amplifier circuit 10 is generally very small. As a consequence of the current I.sub.IN flowing into the sense amplifier circuit 10 being very small, the latch-type sense amplifier circuit 10 is slow in sensing and reacting to the current I.sub.IN.